Compute & silicon·Updated May 28, 2026

Leading-edge foundry (2nm / N2)

The single source of the world's most advanced transistors. TSMC's N2 is sold out through 2026 with orders pushing into 2028 — and there is no real second supplier at the leading edge.

Tightness gaugeCritical

Tightness

82/ 100Critical

+3 this quarter — N2 fully booked through 2026 with 78–104 week lead times pushing new orders into 2028, even as TSMC ramps capacity hard.

Coverage35%
85
Lead time25%
85
Concentration20%
90
Momentum20%
65
N2 capacity 2026E
~100kwafers/mo
as of 2026-04-05·Tech Insider
Lead time
78–104 wkinto 2028
as of 2026-03-23·Paradox Intelligence
N2 wafer price
>$30k~2x 4nm
as of 2026-04-05·Tech Insider
Lead customer
~50%Apple of N2 allocation
as of 2026-03-23·Paradox Intelligence / Wedbush
Why it gates the buildout

Every advanced AI accelerator, CPU, and flagship SoC needs a leading-edge node, and at 2nm there is effectively one supplier. Apple takes roughly half of N2 capacity for consumer devices on a fixed schedule, leaving AI chip designers competing for the rest — so foundry allocation gates the entire frontier of compute, sitting alongside CoWoS and HBM in a triple constraint.

Who's exposed
CompanyRoleExposure
TSMCTSM / TPE 2330
Sole leading-edge (2nm) foundryDirect
ASMLASML
EUV lithography monopolyHigh
Deposition / process equipmentModerate
Etch / GAA process toolsModerate
Samsung FoundryKRX 005930
Distant #2 at the leading edgeWatch
18A challenger, behind on volumeWatch
Catalysts & timeline
H2 2026A16 (1.6nm) high-volume manufacturing with Super PowerRail backside power
2027N2 capacity scales toward ~200k wafers/mo
~2029TSMC Arizona N2 pulled forward, adding US leading-edge capacity
What would loosen it

Samsung or Intel closing the leading-edge gap (unlikely near-term), the 200k wpm 2027 ramp, and Arizona capacity. But TSMC's effective monopoly on the frontier keeps N2 sold out into 2028.

Latest developments
2026-03-23
N2 fully booked with 78–104 week lead times pushing orders into 2028; 2nm + CoWoS + HBM form a triple constraint
2026-01-07
TSMC enters N2 volume production; Taiwan gigafabs reach >50k wafers/mo
2025-08-30
N2 demand outruns the initial ~40k wpm ramp; expansion to ~100k (2026) and ~200k (2027) planned
Linked bottlenecks
CoWoS advanced packagingEUV lithographyHBM (high-bandwidth memory)ABF substrates

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