Silicon & packaging·Updated May 28, 2026

CoWoS advanced packaging

The gate on every advanced AI accelerator shipped — if a chip needs HBM, it needs CoWoS, and capacity is effectively sold out.

Tightness gaugeCritical

Tightness

79/ 100Critical

+7 this quarter — Tightness rose as CoWoS-L demand outran 2026 capacity adds; gap not expected to close until 2027.

Coverage35%
80
Lead time25%
80
Concentration20%
85
Momentum20%
70
Capacity (end 2026E)
~125kwafers/mo
as of 2026-01-05·Bernstein via TheStreet
Global demand 2026
~1Mwafers/yr
as of 2025-08-04·Morgan Stanley
Downstream lead time
36–52weeks
as of 2026-04-06·Spheron
Top-supplier share
~87%of Nvidia sourcing
as of 2025-08-04·Astute Group
Why it gates the buildout

CoWoS bonds the GPU die to its HBM stacks on a silicon interposer. No interposer, no high-bandwidth memory, no usable accelerator. Because nearly all leading-edge capacity sits with one supplier, each hyperscaler's GPU allocation is rationed by how many packaging slots it can secure — making this the true rate-limiter on AI compute, upstream of the chips themselves.

Who's exposed
CompanyRoleExposure
TSMCTSM / TPE 2330
Owns the bulk of CoWoS capacityDirect
OSAT overflow, SoIC rampHigh
AmkorAMKR
US packaging, Arizona buildHigh
Hybrid-bonding tools (>12–18mo lead time)High
Packaging deposition / etchModerate
Glass-substrate alternative to silicon interposerWatch
Catalysts & timeline
H2 2026New TSMC packaging fabs (Chiayi AP7, Tainan AP8) reach volume output
2026–27SoIC + CoWoS hybrid lines scale for next-gen accelerators
End 2027Capacity targeted to ~170k wafers/mo; glass-substrate pilots could relieve interposer scarcity
What would loosen it

Faster-than-guided capacity from ASE and Amkor, a demand air-pocket if GPU orders soften, or a shift to panel-level / glass substrates that sidesteps silicon-interposer scarcity. None look likely to bite before late 2026.

Latest developments
2026-01-28
Analysis: even with $56B 2026 capex, supply-demand gap won't fully close until 2027
2026-01-05
Institutional investors revise TSMC's end-2026 CoWoS capacity forecast up 14% to ~125k wpm
2025-08-04
Nvidia secures ~60% of 2026 CoWoS capacity (~595k wafers)
Linked bottlenecks
Leading-edge foundry (2nm / N2)HBM (high-bandwidth memory)ABF substratessilicon-interposer

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